View MAG3110_5022135.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Freescale Semiconductor Advance Information
Document Number: MAG3110 Rev 2.0, 02/2011
3-Axis, Digital Magnetometer
Freescale's MAG3110 is a small, low-power, digital 3-axis magnetometer. The device can be used in conjunction with a 3-axis accelerometer to produce orientation independent accurate compass heading information. It features a standard I2C serial interface output and smart embedded functions. The MAG3110 is capable of measuring magnetic fields with an Output Data Rate (ODR) up to 80 Hz; these output data rates correspond to sample intervals from 12 ms to several seconds. The MAG3110 is available in a plastic DFN package and it is guaranteed to operate over the extended temperature range of -40C to +85C. Features * * * * * * * * * * * 1.95V to 3.6V Supply Voltage (VDD) 1.65V to VDD IO Voltage (VDDIO) Ultra Small 2 mm x 2 mm x 0.85 mm, 0.4 mm Pitch, 10 Pin Package Full Scale Range 1000 T Sensitivity of 0.10 T Noise down to 0.05 T rms Output Data Rates (ODR) up to 80 Hz I2C digital output interface (operates up to 400 kHz Fast Mode) 7-bit I2C address = 0x0E Sampled Low Power Mode RoHS compliant MAG3110: 3-AXIS DIGITAL MAGNETOMETER
MAG3110
Top and Bottom View
10 PIN DFN 2 mm x 2 mm x 0.85 mm CASE 2154
Applications * Electronic Compass * Dead-reckoning assistance for GPS backup * Location-based Services
Top View
Cap-A VDD NC Cap-R GND
10 GND 9
1 2 3 4 5
INT1 VDDIO SCL SDA
MAG3110
8 7 6
Pin Connections
ORDERING INFORMATION
Part Number MAG3110FCR2 Temperature Range -40C to +85C Package Description DFN-10 Shipping Tape and Reel
This document contains information on a new product. Specifications and information herein are subject to change without notice.
(c) Freescale Semiconductor, Inc., 2011. All rights reserved.
Application Notes for Reference
The following is a list of Freescale Application Notes written for the MAG3110: * AN4246, Calibrating for Soft Iron and Hard Iron Distortions * AN4247, PCB Layout Guidelines and Recommendations * AN4248, Using the MAG3110 Magnetometer for an eCompass Application * AN4249, Using the MAG3110 Magnetometer to Implement a 3-D Pointer
1
1.1
Block Diagram and Pin Description
Block Diagram
X-axis Digital Signal Processing and Control SDA SCL MUX ADC
Y-axis
Z-axis Self-Test
INT1
Clock Oscillator
Trim Logic
Regulator + Reference
VDD VDDIO
Figure 1. Block Diagram
1.2
Pin Description
X 1
Cap-A VDD NC Cap-R GND
1 2 3 4 5
10 GND 9
INT1 VDDIO SCL SDA
MAG3110
8 7 6
Y
Z
(TOP VIEW)
(TOP VIEW)
Figure 2. Pin Connections
Figure 3. Measurement Coordinate System
MAG3110 Sensors Freescale Semiconductor 2
Table 1. Pin Description
Pin 1 2 3 4 5 6 7 8 9 10 Name Cap-A VDD NC Cap-R GND SDA SCL VDDIO INT1 GND Bypass Cap for Internal Regulator Power Supply, 1.95V - 3.6V No Connect - do not connect Cap for Reset Pulse GND I2C Serial Data (Write = 0x1C; Read = 0x1D) I2C Serial Clock Power for I/O Buffers, 1.65V - VDD Interrupt - Active High Output GND Function
1.3
Application Circuit
The device power is supplied through VDD line. Power supply decoupling capacitors (100 nF ceramic) should be placed as near as possible to pins 1 and 2 of the device. VDDIO supplies power for the I/O pins SCL, SDA, and INT1. The control signals SCL and SDA, are not tolerant of voltages more than VDDIO + 0.3 volts. If VDDIO is removed, the control signals SCL and SDA will clamp any logic signals with their internal ESD protection diodes.
1 100 nF 2 3 VDD 1 F 100 nF 100 nF 5
4
10 9 INT1 VDDIO 100 nF 4.7K 4.7K SCL SDA
MAG3110 (Top View)
8 7 6
Figure 4. Electrical Connection
MAG3110 3 Sensors Freescale Semiconductor
2
2.1
Operating and Electrical Specifications
Operating Characteristics
Parameter Test Conditions Symbol FS -15,000 -30,000 So Tc 0.10 0.1 500 Tco 0.01 1 NL
(1)
Table 2. Operating Characteristics @ VDD = 1.8 V, T = 25C unless otherwise noted.
Min Typ 1000 15,000 30,000 Max Unit T bits bits T/bits %/C T T/C % %FS C Full Scale Range Output Data Range (RAW = 1) Output Data Range (RAW = 0) Sensitivity Sensitivity Change vs. Temperature Zero Flux Offset Accuracy Zero Flux Change with Temperature Hysteresis Non Linearity Best Fit Straight Line Temp Sensor Repeatability Magnetometer Output Noise OS = 00 -1 0.3 1 0.14 Noise 0.1 0.07 0.05 20 Vst 20 20 Top -40 +85 LSB LSB LSB C T rms
1
OS = 01 OS = 10 OS = 11 Self-test Output Change(2) X-axis Y-axis Z-axis Operating Temperature Range 1. OS = Over Sampling Ratio. 2. Self-test is one direction only.
2.2
Absolute Maximum Ratings
Stresses above those listed as "absolute maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 3. Maximum Ratings
Rating Supply Voltage Input Voltage on any Control Pin (SCL, SDA) Maximum Applied Magnetic Field Operating Temperature Range Storage Temperature Range Symbol VDD Vin -- Top TSTG Value -0.3 to +3.6 -0.3 to VDD + 0.3 100,000 -40 to +85 -40 to +125 Unit V V T C C
Table 4. ESD and Latch-up Protection Characteristics
Rating Human Body Model Machine Model Charge Device Model Latch-up Current at T = 85C Symbol HBM MM CDM -- Value 2000 200 500 100 Unit V V V mA
This device is sensitive to mechanical shock. Improper handling can cause permanent damage of the part or cause the part to otherwise fail. This is an ESD sensitive, improper handling can cause permanent damage to the part.
MAG3110 Sensors Freescale Semiconductor 4
2.3
Electrical Characteristics
Parameter Test Conditions Symbol VDD VDDIO ODR(1) 10 Hz, OS(1) = 11 ODR 10 Hz, OS = 10 ODR 10 Hz, OS = 01 ODR 10 Hz, OS = 00 ODR 5 Hz, OS = 00 ODR 1.25 Hz, OS = 00 Idd Min 1.95 1.62 900 480 280 A 140 70 24 IddStby VIH VIL IO = 500 A IO = 500 A IO = 500 A VOH VOL VOLS ODR BW BT OS = 1 Ton Top -40 25 +85 0.8*ODR ODR ODR/2 10 0.9*VDDIO 0.1* VDDIO 0.1* VDDIO 1.2 *ODR 0.75*VDDIO 0.3* VDDIO 2 A V V V V V Hz Hz ms ms C Typ 2.4 Max 3.6 VDD Unit V V
Table 5. Electrical Characteristics @ VDD = 2.0V, VDDIO = 1.8V, T = 25C unless otherwise noted
Supply Voltage Interface Supply Voltage Supply Current in ACTIVE Mode
Supply Current Drain in STANDBY Mode Digital High Level Input Voltage SCL, SDA Digital Low Level Input Voltage SCL, SDA High Level Output Voltage INT1 Low Level Output Voltage INT1 Low Level Output Voltage SDA Output Data Rate (ODR) Signal Bandwidth Boot Time from Power applied to Boot Complete Turn-on Time(2) Operating Temperature Range
Measurement mode off
1. ODR = Output Data Rate; OS = Over Sampling Ratio. 2. Time to obtain valid data from STANDBY mode to ACTIVE Mode.
MAG3110 5 Sensors Freescale Semiconductor
2.4
I2C Interface Characteristics
Parameter Symbol I2C Fast Mode Min 0 0 1.3 0.6 0.6 0.6 50(3)
(4)
Table 6. I2C Slave Timing Values(1)
Max 400 TBD Unit
SCL Clock Frequency Pull-up = 1 k, Cb = 20 pF Pull-up = 1 k, Cb = 400 pF Bus Free Time between STOP and START Condition Repeated START Hold Time Repeated START Set-up Time STOP Condition Set-up Time SDA Data Hold Time SDA Valid Time
(5) (6) (2)
fSCL tBUF tHD;STA tSU;STA tSU;STO tHD;DAT tVD;DAT tVD;ACK tSU;DAT tLOW tHIGH tr tf tSP
kHz kHz s s s s s s s ns s s
0.9 0.9 100
(7)
(4) (4)
SDA Valid Acknowledge Time SDA Set-up Time SCL Clock Low Time SCL Clock High Time SDA and SCL Rise Time
1.3 0.6 20 + 0.1Cb(8) 20 + 0.1Cb(8) 1000 300 50
ns ns ns
SDA and SCL Fall Time (3) (8) (9) (10) Pulse width of spikes on SDA and SCL that must be suppressed by input filter
1. All values referred to VIH (min) and VIL (max) levels. 2. tHD;DAT is the data hold time that is measured from the falling edge of SCL, applies to data in transmission and the acknowledge. 3. A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the VIH (min) of the SCL signal) to bridge the undefined region of the falling edge of SCL. 4. The maximum tHD;DAT could be must be less than the maximum of tVD;DAT or tVD;ACK by a transition time. This device does not stretch the LOW period (tLOW) of the SCL signal. 5. tVD;DAT = time for Data signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse). 6. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA output (HIGH or LOW, depending on which one is worse). 7. A Fast mode I2C device can be used in a Standard mode I2C system, but the requirement tSU;DAT 250 ns must then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line tr(max) + tSU;DAT = 1000 + 250 = 1250 ns (according to the Standard mode I2C specification) before the SCL line is released. Also the acknowledge timing must meet this set-up time 8. Cb = total capacitance of one bus line in pF. 9. The maximum tf for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage tf is specified at 250 ns. This allows series protection resistors to be connected in between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specified tf. 10.In Fast mode Plus, fall time is specified the same for both output stage and bus timing. If series resistors are used, designers should allow for this when considering bus timing.
MAG3110 Sensors Freescale Semiconductor 6
Figure 5. I2C Slave Timing Diagram
2.5
General I2C Information
The SCL and SDA signals are driven by open-drain buffers and a pull-up resistor is required to make the signals rise to the high state. The value of the pull-up resistors depends on the system I2C clock rate and the capacitance load on the I2C bus. Higher resistance value pull-up resistors consume less power, but have a slower the rise time (due to the RC time constant between the bus capacitance and the pull-up resistor) and will limit the I2C clock frequency. Lower resistance value pull-up resistors consume more power, but enable higher I2C clock operating frequencies. High bus capacitance is due to long bus lines or a high number of I2C devices connected to the bus. A lower value resistance pull-up resistor is required in higher bus capacitance systems. For standard 100 kHz clock I2C, pull-up resistors typically are between 5k and 10 k. For a heavily loaded bus, the pull-up resistor value may need to be reduced. For higher speed 400 kHz or 800 kHz clock I2C, bus capacitance will need to be kept low, in addition to selecting a lower value resistance pull-up resistor. Pull-up resistors for high speed buses typically are about 1 K. In a well designed system with a microprocessor and one I2C device on the bus, with good board layout and routing, the I2C bus capacitance can be kept under 20 pF. With a 1K pull-up resistor, the I2C clock rates can be well in excess of a few megahertz.
3
Modes of Operation
I2C Bus State I2C communication is possible.
Table 7. Modes of Operation Description
Mode STANDBY Function Description Only POR and digital blocks are enabled. Analog subsystem is disabled.
ACTIVE
I2C communication is possible.
All blocks are enabled (POR, Digital, Analog).
MAG3110 7 Sensors Freescale Semiconductor
4
Functionality
MAG3110 is a small low-power, digital output, 3-axis linear magnetometer packaged in a 10 pin DFN. The device contains a magnetic transducer for sensing and an ASIC for control and digital I2C communications.
4.1
I2C Serial Interface
Communication with the MAG3110 takes place over an I2C bus. The MAG3110 also has an interrupt signal indicating that new magnetic data readings are available. Interrupt driven sampling allows operation without the overhead of software polling.
4.2
Factory Calibration
MAG3110 is factory calibrated for sensitivity, offset and temperature coefficient. All factory calibration coefficients are applied automatically by the MAG3110 ASIC before the magnetic field readings are written to registers 0x01 to 0x06 (see section 5). There is no need for the user to apply the calibration correction in the software and the calibration coefficients are not therefore accessible to the user. The offset registers in the addresses 0x09 to 0x0E are not a factory calibration offset but allow the user to define a hard iron offset which can be automatically subtracted from the magnetic field readings (see section 4.3.3).
4.3
Digital Interface
Table 8. Serial Interface Pin Description
Pin Name VDDIO SCL SDA INT IO voltage I2C Serial Clock I2C Serial Data Data ready interrupt pin Pin Description
There are two signals associated with the I2C bus: the Serial Clock Line (SCL) and the Serial Data line (SDA). External pullup resistors (connected to VDDIO) are needed for SDA and SCL. When the bus is free, both lines are high. The I2C interface is compliant with Fast mode (400 kHz), and Normal mode (100 kHz) I2C standards.
4.3.1
General I2C Operation
I2C is an asynchronous, open collector driven, addressed and packetized serial bus interface. It is capable of supporting multiple masters and multiple slave devices on the same bus. I2C uses two bi-directional lines, the serial clock line or SCL and the serial data line or SDA. Pull-up resistors are required on both lines. An I2C transaction starts with a start condition (START) and ends with a stop condition (STOP). A START condition is defined as a HIGH to LOW transition on the data line while the clock line is held HIGH. A STOP condition is defined as a LOW to HIGH transition on the data line while the clock line is held HIGH. At all other times, the data line can only change state when the clock line is low. If the data line changes state when the clock is high, the I2C transaction is aborted and the new start or stop condition is recognized. After START has been transmitted by the master, the bus is considered busy. The next byte of data transmitted after START condition is the slave address in the first 7 bits, and the eighth bit is the Read/Write (R/W) bit (read = 1, write = 0). The R/W bit determines whether the I2C master intends on receiving data from the slave - Read mode or intends to transmit data to the slave - Write mode. When an address is sent, each device on the I2C bus compares the first 7 bits after a start condition with its own internal address. If the address matches, the device considers itself addressed by the Master and continues to respond. If the address does not match, the device ignores further bus activity until the next start condition happens. The ninth bit (clock pulse), following each I2C byte is for the acknowledge (ACK) bit. The master releases the SDA line during the ACK period. Because of the pull-up resistor, the data line will tend to float high. To signal ACK back to the master, the slave must then pull the data line low during this clock period. The number of bytes per transfer can be unlimited. If a receiving device can't accept another complete byte of data until it has performed some other function, it can hold the clock line, SCL, low to force the transmitter into a wait state. Data transfer only continues when the receiver is ready for another byte and releases the data line. This delay action is called clock stretching. The MAG3110 device does clock stretching. A data transfer is always terminated by a STOP. The MAG3110 I2C 7-bit device address is 0x0E. In I2C practice, the device address is shifted left by one bit field and a read/ write bit is set in the lowest bit position. The I2C 8-bit write address is 0x1C and the read address is 0x1D. The I2C 8-bit write address is 0x3A and the read address is 0x3B. Please consult the factory for alternate addresses. MAG3110 Sensors Freescale Semiconductor 8
See Figure 6 for details on how to perform read/write operations with MAG3110.
Single/Burst Write Operation
IIC Start IIC Slave ADDR (R/W bit = 0) MAG3110 Register Address to Start Write Data0* Data1 -- IIC STOP
* Data Bytes Outgoing Single/Burst Read Operation
IIC Start IIC Slave ADDR (R/W bit = 0) MAG3110 Register Address to Start Read IIC Repeated Start IIC Slave ADDR (R/W bit = 1) Data0* Data1 -- IIC STOP
* Data Bytes Incoming
Figure 6. MAG3110 I2C Generic Read/Write Operations
4.3.2
Fast Read Mode
When the Fast Read (FR) bit is set (CTRL_REG1, 0x10, bit 2), the MSB 8-bit data is read through the I2C bus. Auto-increment is set to skip over the LSB data. When FR bit is cleared, the complete 16-bit data is read accessing all 6 bytes sequentially (OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, OUT_Z_LSB).
4.3.3
User Offset Corrections
The 2's complement user offset correction register values are used to compensate for correcting the X, Y and Z-axis after , device board mount. These values may be used to compensate for hard iron interference. Depending on the setting of the RAW bit (CTRL_REG2, 0x11, bit 5) the magnetic field sample data is corrected with the user offset values (RAW = 0), or can be read out uncorrected for user offset values (RAW = 1). The factory calibration correction is always applied irrespective of the setting of the RAW bit. The factory calibration for gain, offset and temperature compensation is always automatically applied irrespective of the setting of the RAW bit which only controls the subtraction of the user defined hard iron offset.
4.3.4
INT1
The DR_STATUS register (see section 5.1.1) contains the ZYXDR bit which denotes the presence of new measurement data on one or more axes. Software polling can be used to detect the transition of the ZYXDR bit from 0 to 1 but, since the ZYXDR bit is also logically connected to the INT1 pin, a more efficient approach is to use INT1 to trigger a software interrupt when new measurement data is available as follows: 1. Put MAG3110 in ACTIVE mode (CTRL_REG1 = 0bXXXXXX01). 2. Idle until INT1 goes HIGH and activates an interrupt service routine in the user software. 3. Read magnetometer data as required from registers 0x01 to 0x06. INT1 is cleared when register 0x01 OUT_X_MSB is read and this register must therefore always be read in the interrupt service routine. 4. Return to idle in step 2.
4.3.5
Triggered Measurements
Set the TM bit in CTRL_REG1 when you want the part to acquire only 1 sample on each axis. See table below for details.
AC 0
TM 0
Description ASIC is in low power standby mode. The ASIC shall exit standby mode, perform one measurement cycle based on
0
1
the programmed ODR and OSR setting, update the I2C data registers and reenter standby mode. The ASIC shall perform continuous measurements based on the current OSR and ODR settings. The ASIC shall continue current measurement at fastest applicable ODR for programmed OSR. The ASIC shall return to programmed ODR after completing the triggered measurement.
1
0
1
1
MAG3110 9 Sensors Freescale Semiconductor
5
Register Description
Name DR_STATUS(2) OUT_X_MSB(2) OUT_X_LSB
(2) (2)
Table 9. Register Address Map
Type R R R R R R R R R R/W R/W R/W R/W R/W R/W R R/W R/W Register Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0X09 0X0A 0X0B 0X0C 0X0D 0X0E 0X0F 0X10 0X11 Auto-Increment Address (Fast Read)(1) 0x01 0x02 (0x03) 0x03 0x04 (0x05) 0x05 0x06 (0x07) 0x07 0x08 0x09 0x0A 0X0B 0X0C 0X0D 0X0E 0X0F 0X10 0X11 0x12 Default Value 0000 0000 data data data data data data 0xC4 data 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 data 0000 0000 0000 0000 Comment Data ready status per axis Bits [15:8] of X measurement Bits [7:0] of X measurement Bits [15:8] of Y measurement Bits [7:0] of Y measurement Bits [15:8] of Z measurement Bits [7:0] of Z measurement Device ID Number Current System Mode Bits [14:7] of user X offset Bits [6:0] of user X offset Bits [14:7] of user Y offset Bits [6:0] of user Y offset Bits [14:7] of user Z offset Bits [6:0] of user Z offset Temperature, signed 8 bits in C Operation modes Operation modes
OUT_Y_MSB
OUT_Y_LSB(2) OUT_Z_MSB(2) OUT_Z_LSB WHO_AM_I
(2)
(2)
SYSMOD(2) OFF_X_MSB OFF_X_LSB OFF_Y_MSB OFF_Y_LSB OFF_Z_MSB OFF_Z_LSB DIE_TEMP
(2)
CTRL_REG1(3) CTRL_REG2(3)
1. Fast Read mode for quickly reading the Most Significant Bytes (MSB) of the sampled data. 2. Register contents are preserved when transitioning from "ACTIVE" to "STANDBY" mode. 3. Modification of this register's contents can only occur when device is "STANDBY" mode, except the TM and AC bit fields in CTRL_REG1 register.
MAG3110 Sensors Freescale Semiconductor 10
5.1
5.1.1
Sensor Status
DR_STATUS (0x00)
Data Ready Status This read-only status register provides the acquisition status information on a per-sample basis, and reflects real-time updates to the OUT_X, OUT_Y, and OUT_Z registers. Table 10. DR_STATUS Register
Bit 7 ZYXOW Bit 6 ZOW Bit 5 YOW Bit 4 XOW Bit 3 ZYXDR Bit 2 ZDR Bit 1 YDR Bit 0 XDR
Table 11. DR_STATUS Description
ZYXOW X, Y, Z-axis Data Overwrite. Default value: 0. 0: No data overwrite has occurred. 1: Previous X or Y or Z data was overwritten by new X or Y or Z data before it was completely read. Z-axis Data Overwrite. Default value: 0. 0: No data overwrite has occurred. 1: Previous Z-axis data was overwritten by new Z-axis data before it was read. Y-axis Data Overwrite. Default value: 0. 0: No data overwrite has occurred. 1: Previous Y-axis data was overwritten by new Y-axis data before it was read. X-axis Data Overwrite. Default value: 0 0: No data overwrite has occurred. 1: Previous X-axis data was overwritten by new X-axis data before it was read. X or Y or Z-axis new Data Ready. Default value: 0. 0: No new set of data ready. 1: New set of data is ready. Z-axis new Data Available. Default value: 0. 0: No new Z-axis data is ready. 1: New Z-axis data is ready. Z-axis new Data Available. Default value: 0. 0: No new Y-axis data is ready. 1: New Y-axis data is ready. XDR Z-axis new Data Available. Default value: 0. 0: No new X-axis data is ready. 1: New X-axis data is ready.
ZOW
YOW
XOW
ZYXDR
ZDR
YDR
ZYXOW is set to 1 whenever new data is acquired before completing the retrieval of the previous set. This event occurs when the content of at least one data register (i.e. OUT_X, OUT_Y, OUT_Z) has been overwritten. ZYXOW is cleared when the highbytes of the data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) of all active channels are read. ZOW is set to 1 whenever new Z-axis acquisition is completed before the retrieval of the previous data. When this occurs the previous data is overwritten. ZOW is cleared any time OUT_Z_MSB register is read. YOW is set to 1 whenever new Y-axis acquisition is completed before the retrieval of the previous data. When this occurs the previous data is overwritten. YOW is cleared any time OUT_Y_MSB register is read. XOW is set to 1 whenever new X-axis acquisition is completed before the retrieval of the previous data. When this occurs the previous data is overwritten. XOW is cleared any time OUT_X_MSB register is read. ZYXDR signals that new acquisition for any of the enabled channels is available. ZYXDR is cleared when the high-bytes of the data (OUT_X_MSB, OUT_Y_MSB, OUT_Z_MSB) of all the enabled channels are read. ZDR is set to 1 whenever new Z-axis data acquisition is completed. ZDR is cleared any time OUT_Z_MSB register is read. YDR is set to 1 whenever new Y-axis data acquisition is completed. YDR is cleared any time OUT_Y_MSB register is read. XDR is set to 1 whenever new X-axis data acquisition is completed. XDR is cleared any time OUT_X_MSB register is read.
MAG3110 11 Sensors Freescale Semiconductor
5.1.2
OUT_X_MSB (0x01), OUT_X_LSB (0x02), OUT_Y_MSB (0x03), OUT_Y_LSB (0x04), OUT_Z_MSB (0x05), OUT_Z_LSB (0x06)
X-axis, Y-axis, and Z-axis 16-bit output sample data of the magnetic field strength expressed as signed 2's complement numbers. When RAW mode is enabled (RAW = 1), the output range is between -15,000 to 15,000 bit counts (the combination of the 1000 T full scale range and the zero flux offset ranging up to 500 T). When RAW mode is not enabled (RAW = 0), the output range is between -30,000 to 30,000 bit counts when the user offset ranging between -15,000 to 15,000 bit counts is included The DR_STATUS register, OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, and OUT_Z_LSB are stored in the auto-incrementing address range of 0x00 to 0x06. Data acquisition is a sequential read of 6 bytes. If the Fast Read (FR) bit is set in CTRL_REG1 (0x10), auto-increment will skip over LSB of the X, Y, Z sample registers. This will shorten the data acquisition from 6 bytes to 3 bytes. If the LSB registers are directly addressed, the LSB information can still be read regardless of FR bit setting. The preferred method for reading data registers is the burst read method where the user application acquires data sequentially starting from register 0x01. If register 0x01 is not read, the rest of the data registers (0x02 - 0x06) will not be updated with the most recent acquisition. It is still possible to address individual data registers, however register 0x01 must be read prior to ensure reading latest acquisition. Table 12. OUT_X_MSB Register
Bit 7 XD15 Bit 6 XD14 Bit 5 XD13 Bit 4 XD12 Bit 3 XD11 Bit 2 XD10 Bit 1 XD9 Bit 0 XD8
Table 13. OUT_X_LSB Register
Bit 7 XD7 Bit 6 XD6 Bit 5 XD5 Bit 4 XD4 Bit 3 XD3 Bit 2 XD2 Bit 1 XD1 Bit 0 XD0
Table 14. OUT_Y_MSB Register
Bit 7 YD15 Bit 6 YD14 Bit 5 YD13 Bit 4 YD12 Bit 3 YD11 Bit 2 YD10 Bit 1 YD9 Bit 0 YD8
Table 15. OUT_Y_LSB Register
Bit 7 YD7 Bit 6 YD6 Bit 5 YD5 Bit 4 YD4 Bit 3 YD3 Bit 2 YD2 Bit 1 YD1 Bit 0 YD0
Table 16. OUT_Z_MSB Register
Bit 7 ZD15 Bit 6 ZD14 Bit 5 ZD13 Bit 4 ZD12 Bit 3 ZD11 Bit 2 ZD10 Bit 1 ZD9 Bit 0 ZD8
Table 17. OUT_Z_LSB Register
Bit 7 ZD6 Bit 6 ZD6 Bit 5 ZD5 Bit 4 ZD4 Bit 3 ZD3 Bit 2 ZD2 Bit 1 ZD1 Bit 0 ZD0
MAG3110 Sensors Freescale Semiconductor 12
5.2
5.2.1
Device ID
WHO_AM_I (0x07)
Device identification register. This read-only register contains the device identifier which is set to 0xC4. This value is factory programmed. Consult factory for custom alternate values. Table 18. WHO_AM_I Register
Bit 7 1 Bit 6 1 Bit 5 0 Bit 4 0 Bit 3 0 Bit 2 1 Bit 1 0 Bit 0 0
5.2.2
SYSMOD (0x08)
The read-only system mode register indicates the current device operating mode. Table 19. SYSMOD Register
Bit 7 0 Bit 6 0 Bit 5 0 Bit 4 0 Bit 3 0 Bit 2 0 Bit 1 SYSMOD1 Bit 0 SYSMOD0
Table 20. SYSMOD Description
System Mode. Default value: 00. 00: STANDBY mode. 01: ACTIVE mode, RAW data. 10: ACTIVE mode, non-RAW user-corrected data.
SYSMOD
5.3
5.3.1
User Offset Correction
OFF_X_MSB (0x09), OFF_X_LSB (0x0A), OFF_Y_MSB (0x0B), OFF_Y_LSB (0x0C), OFF_Z_MSB (0x0D), OFF_Z_LSB (0x0E)
X-axis, Y-axis, and Z-axis user defined offsets in 2's complement format which are used when RAW = 0 (see section 5.5.2) to correct for the MAG3110 zero flux offset and for hard iron offsets on the PCB caused by external components. The maximum sensible range for the user offsets is in the range -15,000 to 15,000 bit counts comprising the sum of the correction for the zero flux offset (range -500 T to 500 T or -5000 to 5000 bit counts) and the PCB hard iron offset (range -1000 T to 1000 T or -10,000 to 10,000 bit counts). The user offsets are automatically subtracted by the MAG3110 logic when RAW = 0 before the magnetic field readings are written to the data measurement registers 0x01 to 0x06. The maximum range of the X, Y and Z data measurement registers when RAW = 0 is therefore -30,000 to 30,000 bit counts and is computed without clipping. The user offsets are not subtracted when RAW = 1. The least significant bit of the user defined X, Y and Z offsets is forced to be zero irrespective of the value written by the user. If the MAG3110 zero flux offset and PCB hard iron offset corrections are performed by an external microprocessor (the most likely scenario) then the user offset registers can be ignored and the RAW bit should be set to 1. The user offset registers should not be confused with the factory calibration corrections which are not user accessible and which are always applied to the measured magnetic data. Table 21. OFF_X_MSB Register
Bit 7 XD14 Bit 6 XD13 Bit 5 XD12 Bit 4 XD11 Bit 3 XD10 Bit 2 XD9 Bit 1 XD8 Bit 0 XD7
Table 22. OFF_X_LSB Register
Bit 7 XD6 Bit 6 XD5 Bit 5 XD4 Bit 4 XD3 Bit 3 XD2 Bit 2 XD1 Bit 1 XD0 Bit 0 0
Table 23. OFF_Y_MSB Register
Bit 7 YD14 Bit 6 YD13 Bit 5 YD12 Bit 4 YD11 Bit 3 YD10 Bit 2 YD9 Bit 1 YD8 Bit 0 YD7
Table 24. OFF_Y_LSB Register
Bit 7 YD6 Bit 6 YD5 Bit 5 YD4 Bit 4 YD3 Bit 3 YD2 Bit 2 YD1 Bit 1 YD0 Bit 0 0
MAG3110 13 Sensors Freescale Semiconductor
Table 25. OFF_Z_MSB Register
Bit 7 ZD14 Bit 6 ZD13 Bit 5 ZD12 Bit 4 ZD11 Bit 3 ZD10 Bit 2 ZD9 Bit 1 ZD8 Bit 0 ZD7
Table 26. OFF_Z_LSB Register
Bit 7 ZD6 Bit 6 ZD5 Bit 5 ZD4 Bit 4 ZD3 Bit 3 ZD2 Bit 2 ZD1 Bit 1 ZD0 Bit 0 0
5.4
5.4.1
Temperature
DIE_TEMP (0x0F)
Temperature C expressed as an 8-bit 2's complement number. The data allows for temperatures from -128C to 127C but in actual function the range is from -40C to 125C. Table 27. TEMP Register
Bit 7 T7 Bit 6 T6 Bit 5 T5 Bit 4 T4 Bit 3 T3 Bit 2 T2 Bit 1 T1 Bit 0 T0
5.5
Control Registers
Note: Except for STANDBY mode selection, the device must be in STANDBY mode to change any of the fields within CTRL_REG1 (0x10).
5.5.1
Bit 7 DR2
CTRL_REG1 (0x10)
Bit 6 DR1 Bit 5 DR0 Bit 4 OS1 Bit 3 OS0 Bit 2 FR Bit 1 TM Bit 0 AC
Table 28. CTRL_REG1 Register
MAG3110 Sensors Freescale Semiconductor 14
Table 29. CTRL_REG1 Description
DR[2:0] Data rate selection. Default value: 000. See Table 30 for more information. This register configures the over sampling ratio or measurement integration time. Default value: 00. See Table 30 for more information. Fast Read selection. Default value: 0. 0: The full 16-bit values are read. 1: Fast Read, 8-bit values read from the MSB registers. Trigger immediate measurement. Default value: 0 0: Normal operation based on AC condition. 1: Trigger measurement. If part is in ACTIVE mode, any measurement in progress will complete before triggered measurement. In STANDBY mode triggered measurement will occur immediately and part will return to STANDBY mode as soon as the measurement is complete. Operating mode selection. Default value: 0. 0: STANDBY mode. 1: ACTIVE mode. ACTIVE mode will make periodic measurements based on values programmed in the Data Rate (DR) and Over Sampling Ratio bits (OS).
OS [1:0]
FR
TM
AC
Table 30. Over Sampling Ratio and Data Rate Description
DR2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 DR1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 DR0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 OS1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 OS0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Output Rate (Hz) 80.00 40.00 20.00 10.00 40.00 20.00 10.00 5.00 20.00 10.00 5.00 2.50 10.00 5.00 2.50 1.25 5.00 2.50 1.25 0.63 2.50 1.25 0.63 0.31 1.25 0.63 Over Sample Ratio 1 2 4 8 1 2 4 8 1 2 4 8 1 2 4 8 1 2 4 8 1 2 4 8 1 2 Current Est
A
900.0 900.0 900.0 900.0 480.0 480.0 480.0 480.0 275.0 275.0 275.0 275.0 137.5 137.5 137.5 137.5 68.8 68.8 68.8 68.8 34.4 34.4 34.4 34.4 17.2 17.2
Noise Est T rms 0.14 0.1 0.07 0.05 0.14 0.1 0.07 0.05 0.14 0.1 0.07 0.05 0.14 0.1 0.07 0.05 0.14 0.1 0.07 0.05 0.14 0.1 0.07 0.05 0.14 0.1
MAG3110 15 Sensors Freescale Semiconductor
Table 30. Over Sampling Ratio and Data Rate Description
1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 0 0 1 1 0 1 0 1 0 1 0.31 0.16 0.63 0.31 0.16 0.08 4 8 1 2 4 8 17.2 17.2 8.6 8.6 8.6 8.6 0.07 0.05 0.14 0.1 0.07 0.05
5.5.2
Bit 7
CTRL_REG2 (0x11)
Bit 6 -- Bit 5 RAW Bit 4 Mag_RST Bit 3 -- Bit 2 ST_Z Bit 1 ST_Y Bit 0 ST_X
Table 31. CTRL_REG2 Register
AUTO_MRST_EN
Table 32. CTRL_REG2 Description
Automatic Magnetic Sensor Reset. Default value: 0. 0: Automatic magnetic sensor resets off. AUTO_MRST_EN 1: Automatic magnetic sensor resets on. Similar to Mag_RST, however, the resets occur before each data acquisition. Data output correction. Default value: 0. 0: Normal mode: data values are corrected by the user offset register values. 1: Raw mode: data values are not corrected by the user offset register values. The factory calibration is always applied to the measured data stored in registers 0x01 to 0x06 irrespective of the setting of the RAW bit. Magnetic Sensor Reset. Default value: 0. 0: Reset cycle not active. 1: Reset cycle initiate or Reset cycle busy/active. When asserted, initiates a magnetic sensor reset cycle that will restore correct operation after exposure to an excessive magnetic field which exceeds the Full Scale Range (see Table 2) but is less than the Maximum Applied Magnetic Field (see Table 3). When the cycle is finished, value returns to 0. Self-test Z-axis Default value: 0. 0: No Self-test. 1: Self-test, active Z-axis. When this bit is asserted, a magnetic field is generated on the MAG3110 Z-axis to test the operation of this axis. The size of the resulting change is defined as Self-test Output Change in Table 2. The ST_Z bit should be de-asserted at the end of the self-test. Self-test Y-axis. Default value: 0. 0: No Self-test. 1: Self-test, active Y-axis. When this bit is asserted, a magnetic field is generated on the MAG3110 Y-axis to test the operation of this axis. The size of the resulting change is defined as Self-test Output Change in Table 2. The ST_Y bit should be de-asserted at the end of the self-test. Self-test X-axis. Default value: 0. 0: No Self-test. 1: Self-test, active X-axis. When this bit is asserted, a magnetic field is generated on the MAG3110 X-axis to test the operation of this axis. The size of the resulting change is defined as Self-test Output Change in Table 2. The ST_X bit should be de-asserted at the end of the self-test.
RAW
Mag_RST
ST_Z
ST_Y
ST_X
MAG3110 Sensors Freescale Semiconductor 16
6
Geomagnetic Field Maps
The magnitude of the geomagnetic field varies from 25 T in South America to about 60 T over Northern China. The horizontal component of the field varies from zero at the magnetic poles to 40 T. These web sites have further information: http://wdc.kugi.kyoto-u.ac.jp/igrf/ http://geomag.usgs.gov
MAG3110 17 Sensors Freescale Semiconductor
Geomagnetic Field
MAG3110 Sensitivity (0.1 T)
MAG3110 Full Scale Sensitivity (1000 T)
The placement of MAG3110 on the application PCB should be done based on the guidelines given in AN4247, "PCB Layout Guidelines and Recommendations" to minimize magnetic interference to the MAG3110 from other components and ensure that the MAG3110 output does not saturate in fields above 1000 T.
MAG3110 Sensors Freescale Semiconductor 18
7
Suggested PCB Footprint
Please see Freescale application note AN1902 for additional information on guidelines for QFN and DFN printed circuit board design and assembly.
1.82 mm
0.40 mm 0.80 mm
0.22 mm
Footprint Compiles with IPC-7351A Footprint Tolerance: 0.02 mm Solder Paste Stencil: 4 mil thickness, type 3 paste is recommended. Figure 7. PCB Footprint Dimensions
MAG3110 19 Sensors Freescale Semiconductor
PACKAGE DIMENSIONS
CASE 2154-01 ISSUE XO 10 PIN DFN
MAG3110 Sensors Freescale Semiconductor 20
PACKAGE DIMENSIONS
CASE 2154-01 ISSUE XO 10 PIN DFN
MAG3110 21 Sensors Freescale Semiconductor
PACKAGE DIMENSIONS
CASE 2154-01 ISSUE XO 10 PIN DFN
MAG3110 Sensors Freescale Semiconductor 22
How to Reach Us:
Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516 2100 East Elliot Road Tempe, Arizona 85284 1-800-521-6274 or +1-480-768-2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) www.freescale.com/support Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor China Ltd. Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing 100022 China +86 010 5879 8000 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center 1-800-441-2447 or +1-303-675-2140 Fax: +1-303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com
Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals", must be validated for each customer application by customer's technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Xtrinsic is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. (c) Freescale Semiconductor, Inc. 2011. All rights reserved.
RoHS-compliant and/or Pb-free versions of Freescale products have the functionality and electrical characteristics of their non-RoHS-compliant and/or non-Pb-free counterparts. For further information, see http:/www.freescale.com or contact your Freescale sales representative. For information on Freescale's Environmental Products program, go to http://www.freescale.com/epp. MAG3110 Rev. 2.0 02/2011

▲Up To Search▲

Price & Availability of MAG3110

	To Download MAG3110 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .